Modern-day high-volume semiconductor manufacturing is a complex process that spans numerous stages and nodes. And with the ever increased focus on quality and cost, the manufacturing supply chain is ...

Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the ...

Partially defective, marginal die can still be functional enough to pass final electrical test. Some of these “walking wounded” chips get past final testing, but in the customer’s end product, under ...

Semiconductor wafers serve as the foundational substrate for microelectronic devices, yet their production is prone to a variety of surface and subsurface defects that compromise yield and reliability ...

Known-good-die (KGD) sort is a commonly used technique in semiconductor processing that allows IC device engineers to bypass the packaging of defective semiconductor devices, saving time and money.

Chemical mechanical polishing (CMP) – also known as planarization – has long been the most commonly employed technique for smoothing and flattening wafer surfaces during the fabrication of ...

Numerous challenges have to be overcome during design and production of ICs below 90 nm. Manufacturing processes are still being characterized, and the interactions between the physical processes and ...